IDT821054PQF【PDF 21/45 页】IC PCM CODEC QUAD MPI 64-PQFP

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IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE

INDUSTRIAL TEMPERATURE RANGE

pins respectively. When the SB3 pins of Channel 1 to Channel 4 are configured as outputs, the control data is written to these four SB3

pins via the SB3[0] to SB3[3] bits respectively.

GREG13: FSK Flag Length, Read/Write (2CH/ACH)

The flag signal is a stream of ‘1’ which is transmitted between two message bytes during Caller-ID messages transmission. The Flag

Length bits FL[7:0] determine the number of the flag bits. The flag length can be from 0 to 255 (d) bits. The default flag length is 0 (i.e.

FL[7:0] = 00H), which means that no flag signal will be transmitted.

GREG14: FSK Data Length, Read/Write (2DH/ADH)

The Data Length bits DL[7:0] determine the number of the data bytes that will be transmitted except the flag signal. The data length can

be from 0 to

64 (d) bytes. Any value larger than 64 (d) in this register will be taken as 64 (d) by the CODEC. The default data length is 0

(d), which means that no data bytes will be transmitted.

GREG15: FSK Seizure Length, Read/Write (2EH/AEH)

The Seizure Length is the number of ‘01’ pairs that represent the seizure phase. The Seizure Length is two times of the value of the

SL[7:0] bits. The value of the SL[7:0] bits can be from 0 to 255 (d), corresponding to Seizure Length of 0 to 510 (d). The default value is

0 (d), which means that no seizure signal will be transmitted.

GREG16: FSK Mark Length, Read/Write (2FH/AFH)

The Mark Length bits ML[7:0] determine the number of the mark bits of ‘1’, which is transmitted in initial flag phase. The Mark Length can

be from 0 to 255 (d). The default value is 0 (d), which means that no mark signal will be transmitted.

GREG17: FSK Start, Mark After Send, BT/Bellcore Selection, FSK Channel Selection and FSK On/Off, Read/Write (30H/B0H)

The FSK Channel Select bits (FCS[1:0]) select a channel on which the FSK signal is generated.

FCS[1:0] = 00:

Channel 1 is selected (default);

FCS[1:0] = 01:

Channel 2 is selected;

FCS[1:0] = 10:

Channel 3 is selected;

FCS[1:0] = 11:

Channel 4 is selected.

The FSK On/Off bit (FO) enables or disables the FSK function block.

FO = 0:

The FSK function block is disabled (default);

Command

R/W

1011

I/O data

FL[7]

FL[6]

FL[5]

FL[4]

FL[3]

FL[2]

FL[1]

FL[0]

Command

R/W

1011

I/O data

DL[7]

DL[6]

DL[5]

DL[4]

DL[3]

DL[2]

DL[1]

DL[0]

Command

R/W

1011

I/O data

SL[7]

SL[6]

SL[5]

SL[4]

SL[3]

SL[2]

SL[1]

SL[0]

Command

R/W

1011

I/O data

ML[7]

ML[6]

ML[5]

ML[4]

ML[3]

ML[2]

ML[1]

ML[0]

Command

R/W

1100

I/O data

Reserved

FCS[1]

FCS[0]

MAS

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IDT821054PQFG 功能描述:IC PCM CODEC QUAD MPI 64-PQFP RoHS:是类别:集成电路 (IC) >> 接口 - 编解码器系列:- 标准包装:2,500 系列:- 类型:立体声音频数据接口:串行分辨率（位）:18 b ADC / DAC 数量:2 / 2 三角积分调变:是 S/N 比，标准 ADC / DAC (db):81.5 / 88 动态范围，标准 ADC / DAC (db):82 / 87.5 电压 - 电源，模拟:2.6 V ~ 3.3 V 电压 - 电源，数字:1.7 V ~ 3.3 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装封装/外壳:48-WFQFN 裸露焊盘供应商设备封装:48-TQFN-EP（7x7）包装:带卷 (TR)

IDT821064 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:QUAD PROGRAMMABLE PCM CODEC WITH GCI INTERFACE

IDT821064PQF 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:QUAD PROGRAMMABLE PCM CODEC WITH GCI INTERFACE

IDT821068 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:OCTAL PROGRAMMABLE PCM CODEC

IDT821068PX 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:OCTAL PROGRAMMABLE PCM CODEC

IDT821621 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:LONG HAUL SLIC

IDT821621J 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:LONG HAUL SLIC

IDT8217LP35P 制造商:Integrated Device Technology Inc 功能描述:

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